TRACKING PERFORMANCE AND TRANSIENT RESPONSE FOR CURRENT CONTROL OF PWM POWER CONVERTERS BASED ON OPEN-LOOP GAIN

AND PHASE LIMITS

Rubens D. Miranda, Wilson Komatsu Departamento de Energia e Automação Elétricas – Escola Politécnica da Universidade de São Paulo

Av. Prof. Luciano Gualberto, Travessa 3, 158 – Sala A2-07 - CEP-05508-900 – São Paulo – SP - Brasil r.dmiranda@gmail.com; wilsonk@usp.br;

Abstract – The study of the loop gain frequency response is a powerful tool that may be adequately used as a design method for current controllers in PWM power converters. The purpose of this paper is to present a methodology to obtain the gain limits for the current controller conditioned or subjected to certain desired performance criteria. The tracking performance and transient response of the system are investigated by means of the plant simulation outcomes and a method for determination of controller gains is developed. Experimental results are presented for an H-Bridge PWM power inverter prototype for validation of the proposed method.

Keywords – Digital Signal Processing (DSP), power

electronics modeling, PWM power converter, digital controller design, open-loop gain and phase margins.

I. INTRODUCTION

It is well known that for different industrial applications, as AC-DC conversion, uninterruptible power supplies (UPS), active front-end power filters and adjustable-speed motor drives, the option for PWM power converters has become an widespread and effective solution for energy conversion purposes, especially due their flexibility, high speed operation and performance with very acceptable energy efficiency. The recent progress on PWM power converter applications are highly motivated by advances on several areas, but three main reasons, are which have been responsible for consolidating this type of technology, are: the improvement of semiconductor power switches, the advances in digital control and the advent of even faster microcontroller technologies.

For successful control implementation on the power converter, the correct implementation of internal current controllers are mandatory, as well as the appropriate choice of its gains, consequently the analysis of the loop gain frequency response is fundamental for effectiveness on the control strategy, both on complex adaptive controllers with sophisticated algorithms [1] as on a simpler proportional control structure.

On the current regulation schemes for power converter, the determination of the digital controller gains are done keeping in mind the limitations imposed by sampling effects and open-loop time delays [2 and 10]. In [3], gain limits are analyzed for proportional and proportional-integral (PI) current controllers as a function of plant parameters for

continuous time domain and the tracking performance and disturbance rejection are evaluated.

Thus, this paper aims to present a methodology for graphical and analytical determination of gains limits for digital current controllers subject to predefined performance criteria. Through experimental outcomes, and based on the analytical results, it is showed that the selected proportional and integral gains, the transient response and tracking performance are linked and these effects are investigated. Finally, a method for analysis of closed-loop system is developed, subjected to previous established performance criteria and based strictly on the open-loop parameters of the real system (considering time delays and sampling effects).

II. PWM POWER CONVERTER AND SYSTEM MODELING:

This section presents the configuration of PWM power converter system, providing sufficient resources for obtaining the system model, the basis for design of the inner current loop digital controller. The following diagram presented on Fig. 1 shows structure of the system used for the analysis and investigation of digital current controller.

Fig. 1. Representation of the power converter system adopted for

investigation of digital current controller.

The full-bridge topology (known as H-bridge) has been widely exploited [4, 5], due its simplicity and relative easy

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implementation and is adopted for generation of the three-level output voltage on the single-phase power converter.

The PWM modulator is employed to generate the uniformly sampled pulse patterns, modulated with a centered triangular carrier waveform with frequency in a manner that its operation are synchronized with the double update sampling events of the A/D conversion as can be seen in [4].

With the purpose of analyzing the behavior of the current loop control, it is been considered that the power converter is fed by a voltage supply with enough energy so that DC bus voltage may be considered constant.

The load has an output inductor (with losses represented by resistance ) connected in series with a voltage source . This source can emulate the voltage behavior of a generic load, linear or nonlinear, on analysis of different power converter applications, e.g. a voltage output in uninterruptible power supplies or the back e.m.f for adjustable speed drives. For active power filters or PWM rectifiers, in most cases, the utility may be represented as a simple independent source. From this brief overview of the power converter, the plant model is next derived.

A. Power plant transfer function: The power plant to be controlled is composed of the

output filter inductor and of the power converter as can be seen on fig. 1. The main control objective of the current loop is to achieve a desired tracking performance for the current reference with an acceptable predefined error, in order to control the inductor current .

The voltage source is modeled as an input disturbance that can be rejected by the controller action or, in some cases, can be compensated by a feed-forward implementation of the measured disturbance voltage. After these assumptions, the power plant transfer function, presented in (1), is derived from the time-domain equations for the adopted load model.

· · 1· · (1)

It should be noted in (1) that is the normalized (per

unit) converter reference voltage, at the output of the PWM modulator, and thus the PWM power converter is modeled as a voltage-controlled voltage source with static gain equal to .

B. Synchronized operation of A/D converter for digital PWM modulator:

The synchronized operation between the A/D converter sampling and the digital PWM modulator (also known as uniformly sampled PWM or DPWM) is an essential solution for the successful implementation of feedback loop for the inductor current control.

As stated in [2, 4 and 10], if the current sampling and switching processes are suitably synchronized, the aliasing effect is avoided and one has the automatic reconstruction of the local average value of the sampled inductor current, which is exactly what has to be controlled, i.e. the switching effects (current ripple) are removed without limit the controller performance. This strategy even helps to reduce

the complexity for the current controller design, since there is no need of low-pass filters (at the signal conditioning circuits and A/D conversion blocks at fig. 1) for elimination of the ripple from the sampled signal.

The equivalent transfer function for the A/D conversion process is presented in (2), considering an ideal sampling process, cascaded with a zero-order hold function (ZOH), as adopted in [6, 7]. 1 ·· (2)

where, is the sampling period of the A/D converter. Basically, it is well understood, that the uniformly

sampled PWM or DPWM with single update, can be approximated as a simple transport delay of one switching period ( ), while in the naturally sampled PWM, the actuation delay can be considered negligible [2, 4 and 10].

Therefore, one can be concluded that passing from an analog to a digital PWM implementation increases the system response delay, which can be translated as a significant reduction of the system’s phase margin and compels the design of a more restrictive current regulator, with a lower closed loop system bandwidth as consequence [2].

Then, in order to reduce the delay effect on DPWM modulation, the double update mode of operation is adopted. In this mode, the duty-cycle is updated at the beginning and at the half of the modulation period as can be seen on Fig. 2b.

Fig. 2. (a) Implementation of digital PWM running on double update mode and in (b) the delay effect on DPWM waveform

pattern is compared with natural PWM behavior. Note that in the occurrence of a perturbation, the

modulator time delay is cut by half, if compared to single update mode because the duty-cycle update can be performed

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at each half switching period. In this case, an asymmetric pulse is generated, but the symmetry may be restored afterward, so that this temporary loss has little consequences on the A/D conversion process i.e. on sampling of the current output.

The transfer function for the DPWM modulator with double update mode (with triangular carrier) is formally presented on [4], which can be well simplified to a transport delay of one fourth of the switching period ( ), with unit gain (as stated at fig. 2b, for normalized triangular carrier, operating between -1 and 1), for 0.5 (i.e. considering the centered steady-state duty cycle of the DPWM modulator) as adopted in [2 and 10] and thus, the final result is:

12 · · ·

· (3)

C. Normalization methods for implementation of per unit controllers and plant:

The application of scaling methods on design of digital controllers plays an important role on the control of dynamical systems. This methodology is largely employed on multivariate control to outline common problems related to scaling and range of different physical units and, obviously these benefits can also be extended for single-input single-output systems.

The process scaling has numerous advantages, for example, it allows solid physical basis for controller design, it facilitates their evaluation and it enables the adoption of maximum resolution for fast fixed-point calculations. In this last case, the speed and the reliability of control algorithm implemented on the DSP microcontroller are improved, since calculated variables are based on unit values. As an additional advantage, it is worth emphasizing that the adoption of normalization makes the digital control more adaptive for implementation and performance comparison of the same control algorithm on other plants with different parameters.

Fig. 3. (a) Controller denormalization process and

(b) Normalization of nominal plant.

As it is shown on Fig.3, two different approaches may be considered for normalization of the closed-loop current control. It can be noted that there is a scaling factor, which has impedance unit, direct related with the static gains of the actuator (power converter) and of the current measurement (current transducer).

Considering the impedance scaling factor and applying simple block manipulations, it is possible to obtain the normalization of the power plant (Fig. 3b) or the attainment of the denormalized controller, result of the direct product of the impedance scaling factor and the normalized (per unit) digital controller (Fig. 3a).

As seen in [3], if the normalized controller is adopted, the determination of gains and operation limits are related with per unit parameters of the plant. Taking the power converter system on Fig.1 as an example, the normalization leads to the following result for the normalized plant transfer function:

· 1·

· 1· (4)

In (4), is the obtained scaling factor (with

impedance unit) that normalizes the plant and is the inverse multiplying factor for the current measurement process that normalizes the measured output inductor current, taking into account the signal scaling and offset compensation into the sampling process (A/D conversion) as well as linear effects of dynamic gains at signal conditioning.

Additionally, considering that ω, if another normalization is applied on (4), adopting the fundamental frequency of the system (ω 377 / ) as a second scaling factor, the plant can be adequately exploited as a function of the per unit inductor impedance of the converter, i.e.:

1· . . . . (5)

where: ω ω is the normalized frequency;

. . ω · is the normalized reactance;

. . is the normalized loss resistance.

III. RESULTS FOR TRACKING PERFORMANCE AND TRANSIENT RESPONSE CRITERIA AS FUNCTION OF

OPEN-LOOP PARAMETERS:

At this section, the proposed method for system performance evaluation is presented. The results demonstrate that the system closed-loop performance can be fully evaluated with basis on the open-loop frequency response and on the desired tracking, phase and transient performance

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factors. It is also shown how these parameach other. The discussion regardperformance and transient response is algebraic manipulations. It shall bemethodology does not take into accountthe real system as switching dead time,distortions, saturation of PWM modulator

A. Analysis of the open-loop system: The frequency response of an open-lo

typically analyzed by cascading the plantransfer functions. Obviously, for the imdigital current control, the delay effect caDPWM modulator and by digital algmust be taken into account. Thus, thgeneralized open-loop transfer function is

ω ω · ω · ω

where, ω is the normalized controland is the total delay time in the loop.

On composition of the total time d

open-loop, the inherent delay of the digitthe computation delay (due to time calcucontrol algorithm) are considered.

As stated in [4], on the synchronizsampled DPWM modulator, the current is updated only on the next samplinconsidering DPWM modulator operatinmode, the total delay time on the loop is of the switching period ( 0.75 )

For the subsequent analysis, a graphadopted, using the open-loop system Boorder to help obtaining some important suthe proposed method.

Fig. 4. Frequency response of the open-loperformance limits found on the prop

1) Behavior of closed-loop magnitudfunction of open-loop parameters: The (7) and (8), proves that the behavior system can be fully defined by the openboth results, one concludes that the open

meters are related to ding the tracking achieved by simple e noted that this t the some effects of nonlinear sampling r, etc.

oop control system is nt and the controller

mplementation of the aused by the sampled orithm computation

he definition of the s straightforward:

ω· (6)

ler transfer function .

elay present on the tal modulator (3) and ulation of the current

ed operation of the duty-cycle reference

ng period. Thus, if ng on double update equal to three-fourth [2]. hical explanation is ode plot (Fig. 4), in ubsequent results for

op system (with the posed method)

de and phase as a results presented in of the closed-loop

n-loop parameters. In n-loop gain must be

maximized in order to reach[2 and 3]. However, due to limodeling and time-delays ongain cannot be indefinipropagation of oscillatory beto exhibit since self-sustainproblems [4, 6, 7 and 8].

Thus, the open-loop transin (7), based on its magnitu(represented by ω and φsimple cartesian transformati

ω ω

From the relation betwetransfer functions [6 and 8magnitude and phase scalarresponse as follows:

ωω1 ω

ω

From (8), the closed-loopand the closed-loop phase scas functions of the open-loop

ωω 2

ϕ ω φ ω tg2) Closed-loop tracking

condition for minimum aspecified frequency range is sThus, defining initially ε magnitude tracking error maximum frequency in whitracking performance, if threspected, the required tracki

ω 1 ε

Substituting (9) on (11) aφ φ ω :

2 cosφ

h the ideal tracking performance mitations on the physical system

n the open-loop, the proportional itely increased, because the ehavior, that can lead the system ned oscillations until instability

fer function (6) is again defined ude and phase scalar functions φ ω , respectively) by means of ions:

ω · φ ω (7)

een open-loop and closed-loop 8], it is also possible to find r functions for the closed-loop

ω · φ ω1 ω · φ ω

ϕ ω (8)

p magnitude scalar function (9) calar function (10) are obtained

p scalar functions:

ωω cos φ ω 1 (9)

sin φ ωω cos φ ω

(10)

performance condition: A acceptable amplitude error on stated, based on previous results.

as the maximum allowable and considering ω as the

ich it is possible to ensure the he condition defined in (11) is ing performance is reached:

(for ω ω ) (11)

and squaring, for ω and

1 1 ε (12)

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Defining: δ 1 ε as a performance factor, directly related with the tracking error and substituting it on (12) results on:

1 δ 2 δ cosφ δ 0 (13)

Solving (13) (second degree equation) for ω results on the condition for magnitude tracking performance stated on (11) and therefore the minimum system open-loop gain is obtained in (14), for solution ω with φ φ ω , defined on each frequency of interest (i.e. for ω ω ):

δ cosφ δ δ sin φ1 δ (14)

The minimum gain condition can be seen graphically on

the magnitude plot of Fig. 4, the condition is reached adopting a minimum controller gain whose open-loop magnitude function be located above the region 1.

3) Resonance peak limitation for the closed-loop system: The phase condition stated on (15) is additionally derived as a limitation on the resonance peak for the closed-loop system response, avoiding excessive oscillations on the system during reference changes, load variations and other transient conditions that could cause the false trigger of protection routines of the power converter.

Thus, the resonance peak on closed-loop system may be limited with the relation:

ω (15)

In (15), is the maximum allowable resonance peak for the closed-loop magnitude. Typical values are situated from 1.05 to 1.2, [8]. Then, substituting (9) on (15), squaring and rearranging, for ω and φ φ ω , it follows:

1 2 cosφ

cosφ 1 2 (16)

Analyzing (16), it can be understood that the resonance

peak on the closed-loop system is related with the phase limit (φ ω ) dependent of angle itself and the values of the system open-loop gain. Thus the condition to limit the resonance peak is derived:

φ 1 2 φ (17)

From (17), if 1 is considered, the condition for absence of peak resonance on the closed-loop is achieved:

φ12 (18)

Thus, the phase limit condition for the open-loop phase

can be seen graphically on the phase plot in Fig. 4. The peak resonance limits are ensured if the open-loop phase function is maintained inside the bounds established by region 2.

B. Analysis of current controller using the proportional control:

The application of proportional controller for the PWM power converter current control is extensively explored [2, 3, 5 and 10] due mainly to the simplicity, easy implementation and fast response. Some strategies for proportional gain determination have been proposed, based on gain limits investigation [2, 3 and 10], stability gain and phase margins [4 and 7] and on Nyquist criteria algebraic analysis [9].

In this paper, the determination of the minimum proportional gain is based on a predefined minimum tracking performance error, which is direct related with the system open-loop gain. On the other hand, on the digital control of the power converter, the superior limits for proportional gain are explored according to safety specifications for gain and phase margins (taking into account the system inaccuracies and time-delays) and some recommendations adopted for determination of the maximum bandwidth for sampled-data systems [6 and 7].

1) Comparative analysis of the current control for natural and uniformly sampled PWM modulation: It has been shown on Fig. 4 that, adopting the natural or digital PWM modulators, the current loop control open-loop magnitude response are practically the same on all the control frequency bandwidth. This result was expected, once that both open-loop systems (with natural PWM and digital PWM) differ only by the presence of time-delay (for DPWM modulator) [4]. Thus, substituting (5) on (6), for proportional control of DPWM power converter, results: | | | | · | | · ω · 1· . . . . (19)

where, is the normalized proportional gain.

2) Limitations on the natural PWM modulation: It is shown on [3], and there is common agreement about the relation between the slope of the triangular carrier waveform of the PWM modulator and the derivative limitation for the output inductor current in order to avoid multiple switching for the natural PWM modulator. Thus, this condition is

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usually applied for determination of the maximum proportional gain which was proved to be dependent of the switching frequency and the parameters of the plant (output inductor filter).

3) Limitation and stability margins for the uniformly sampled DPWM power converter: On the digital control of the power converter, the maximum normalized proportional gain is determined according to some considerations adopted on sampled-data systems. It is asserted that for adequate reproduction of a given signal, in practical, the sampling frequency must be six to ten times superior to the frequency signal bandwidth [4, 6 and 7]. By modeling the DPWM modulator (operating in double update mode) as a sampler with sampling frequency equal to twice the switching frequency, as seen in [2, 3, 4 and 10], this condition defines the bandwidth limitation for the open-loop system (see region 3 on Fig. 4):

2 · . . (20)

where, is the number of pulses per cycle and is the frequency bandwidth factor.

For the DPWM modulator, and in accordance with the

adopted normalization parameters, also can be considered the normalized switching frequency. Thus, the maximum proportional gain on (20) is obtained by adjusting the crossover frequency on (19), considering the sampling condition (established by the minimum frequency bandwidth factor). For high frequencies, the normalized resistance parameter can be neglected without significant loss.

C. Extensions from proportional to PI current controller: The proposed methodology can be extended to the PI

current controller, keeping in mind that the adequate design of the proportional gain is mandatory for good performance of the current control.

The adopted strategy consists on adjustment on the proportional gain according to (20), setting the integral gain with the purpose of improvement of the phase margin of the open-loop system, as can be seen in [4].

Thus, the open-loop phase condition is presented in (21) for determination of the integral gain as a function of the phase margin specifications ( ):

φ 32 (21)

where:

is the normalized controller phase function;

is the normalized power plant phase function.

For the digital PI controller, applying the Backward Euler discretization method [4, 6 and 7], the exact magnitude and the phase functions are presented on (22) and (23), respectively:

| | 2 (22)

tg 2 tg (23)

where:

1 cos sin .

IV. SIMULATION AND EXPERIMENTAL RESULTS:

Experimental results are presented by means of an H-Bridge PWM power inverter prototype and its simulations are implemented for comparative analysis of both results for validation of the proposed method. The control algorithm is implemented on a Texas Instruments TMS320F2808 DSP board and the converter voltages and currents are measured, respectively, by means of LEM LA-25NP and LV20-P Hall-effect sensors. The current reference is measured by means of a D/A conversion outputs, available on the signal conditioning board integrated with the digital controller.

TABLE I Power converter parameters

Parameters: Nominal: Per unit: DC link voltage 50 V 1.0 p.u.

Nominal peak current 2.5 A 1.0 p.u. Switching frequency 19.2 kHz 320 p.u. Sampling frequency 38.4 kHz 640 p.u. Nominal frequency 60 Hz 1.0 p.u.

Output filter reactance 1.885 Ω 0.0943 p.u. Output filter resistance 0.1 Ω 0.005 p.u.

Load resistance 35 Ω 1.75 p.u. The experimental and the simulated parameters are

presented on Table I and according to (20), and adopting 10, the maximum proportional gain is: 0.1 · 640 · 0.0943 6.035 . . 120.6Ω . The tracking performance can be evaluated for the

fundamental frequency component ( 1). Substituting (7) on (12) and manipulating, a maximum tracking error of 0.3% ε 0.0029 is ensured for the selected proportional gain.

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Fig. 5. Simulated results (using normalized values) for a reference change from 0 to 0.5p.u. Current reference (red), measured current

(green) and load voltage (yellow).

Simulation results are presented for the power converter supplying a resistive load. In Fig. 5, the response for a current reference change from 0 to 0.5 . . at 16.6 is performed, adopting a proportional gain of 6.035 . . It is noticed that the current regulator presents an acceptable tracking performance, with fast response and no occurrence of overshoot, once as expected for the proposed method, the selected gain respects the condition established on (18).

Fig. 6. Reference change from 0 to 0.5p.u.

Current reference on DAC output (green / channel 2); Measured output current on DAC output (purple / channel 3);

Measured load voltage (differential probe) (yellow / channel 1); Measured output current (current probe) (magenta / channel 4);

On Fig. 6, the experimental measured results are

presented, for same conditions stated on simulation in Fig. 5. Simulation and experimental results are compatible, and thus the proposed power converter model can be validated.

In the apparatus, the voltage disturbance is cancelled by means of positive feedforward of the measured load voltage for performance improvement of the current regulator, once it is well known that the disturbance rejection is very poor for the proportional current controller [2 and 3].

Fig. 7. Experimental results for a resistive load change from 0.85 to

1.75 p.u. (same probe disposals adopted in Fig. 6)

It is noticed that the high frequency switching of the converter causes noise on the measurements. Thus, in the following experimental results, the measurement is adequately slightly filtered by means of an average filtering resources present on the oscilloscope.

In Fig. 7, the response for a change on the resistive load from 17 to 35Ω (0.85 to 1.75 p.u.) is performed on the experimental apparatus. It can be noted that even if the open-loop system bandwidth (indicated as the point P1 on Fig. 4) to one fourth of the switching frequency (for 8) which is equivalent of a proportional gain of 7.54 . . (above the safe limit) the system is still stable, without oscillations. It must be taken into account, that uncertainties on the plant parameters (filter inductance) can lead the system to instability, so the adoption of safe margins to ensure the design robustness is recommended.

Fig. 8. Experimental results for a reference change from 0 to 0,5p.u. for the power converter presenting high frequency

oscillations due to a high proportional gain Fig. 8 presents the response for a change on current

reference (from 0 to 0.5p.u.) on the experimental set. It can be seen that if the open-loop system bandwidth is reduced to one third of the switching frequency (equivalent of a

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proportional gain of 10.05 . . or 6), the power converter works in an undesirable region and shows sustained high-frequency oscillations (instabilities).

On simulation, it was verified that the instabilities (sustainable oscillations) takes place when open-loop system bandwidth is located beyond one half and one third of the switching frequency, showing that simulation and experimental results are consistent.

Additionally, experimental results for the power converter connected to the grid utility and operating as a power rectifier with high power factor is presented. On this application, a simple current PI controller is implemented and the grid voltage is used for synchronized current reference generation, as showed in Fig.9. Although there are successful strategies to dynamically limit the saturation (antiwindup) of the integral part and consequently, improve the transient performance on this type of controller [4], a basic digital PI structure is implemented.

The proportional gain has the same value adopted on the case exposed on Fig. 6 and the integral gain is obtained with the proposed method stated on (21), (22) and (23), for 60 3 i.e. an integral gain of 960 . .

Fig. 9. Experimental results for the power converter connected

to utility grid (operating as a high power factor rectifier) It shall be noticed that the current reference has the same

harmonic content of the voltage utility, and the current regulator has a very good performance on tracking of this harmonic components, with an acceptable and limited overshoot response 1.05 5% , adopting the proposed method.

V. CONCLUSIONS

This paper has proposed a methodology for evaluation of the system performance as function of open-loop system parameters. For current loop controllers, it was verified that the minimum gain is related and defined by the tracking error (Region 1 of Fig. 4). On the other side, it was proved that the maximum gain determines the maximum allowed amplitude of the inductor current (Region 2 of Fig. 4) and it also limits the bandwidth of the system (Region 3 of Fig. 4). Moreover, the maximum gain influences the stability limits of the

closed loop system. The impact of the sampling process (ADC), digital PWM strategy and its inherent delay and of the sampling frequency on design of the controller was analyzed to define all regions of Fig. 4.

The proposed method was then applied to the proportional controller of a current loop and the maximum gain limit was determined. Simulation and experimental results were presented for a PWM power converter operation with two distinct load connections (pure resistive load and utility grid) at output, validating the design technique. An important result is that for the proportional controller, the open loop bandwidth can be increased up to one fourth of the switching frequency and the system will still be stable, without oscillations, showing that there is some safe margin on maximum gain if compared to the results of [4, 6 and 7].

By the nature of the proposed method, its application can be extended to other types of controllers for continuous or discrete time domain and for different types of control processes.

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